Static verification and software testing are not able to verify software single-handedly. Therefore, another approach called run-time verification dealing with verifying software behavior against constraints at run-time received attention. However, the run-time verification faces the problem of verification of run-time activities against the constraints are specified in high-level and abstractly because their natures are different from each other. Focused on reactive software, in three steps this paper presents an approach called SRG to generate run-time verification rules in terms of run-time activities from abstract specification and constraints of problem. The approach: (1) presents a visual and reactive model of problem specification and then generates ground rules of run-time behavior of software in real-time logic, (2) specifies in real-time logic the constraints should be met by software at run-time, and (3) generates verification rules from the constraints and the ground rules. Last of all, the SRG approach is applied to message communication protocol.
Babamir,S. M. and Jalili,S. (2010). A Specification-Based Approach to Generate Verification Rules of Reactive Software. The Modares Journal of Electrical Engineering, 10(1), 13-38.
MLA
Babamir,S. M. , and Jalili,S. . "A Specification-Based Approach to Generate Verification Rules of Reactive Software", The Modares Journal of Electrical Engineering, 10, 1, 2010, 13-38.
HARVARD
Babamir,S. M.,Jalili,S. (2010). 'A Specification-Based Approach to Generate Verification Rules of Reactive Software', The Modares Journal of Electrical Engineering, 10(1), pp. 13-38.
CHICAGO
S. M. Babamir and S. Jalili, "A Specification-Based Approach to Generate Verification Rules of Reactive Software," The Modares Journal of Electrical Engineering, 10 1 (2010): 13-38,
VANCOUVER
Babamir,S. M.,Jalili,S. A Specification-Based Approach to Generate Verification Rules of Reactive Software. The Modares Journal of Electrical Engineering, 2010; 10(1): 13-38.